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Winbond IPMI Solution
q IPMI BMC (W83910F) q IPMI Sensor
Contact Persons : Chad M.C. Wu Email : mcwu0@winbond.com.tw Tel : 886-3-5770066 ext 7012 Frank S.F. Huang Email : sfhuang0@winbond.com.tw Tel : 886-3-5770066 ext 7085
All trademarks and brand names belong to their respective owners.
Winbond Electronics
Page 1 Mar/2001
W83910F & IPMI 1.5 Block Diagram
LAN New MODEM New Remote Mgmt. Card ICMB ICMB Bridge Controller Aux. IPMB IPMB RS-232 Mgmt SMBus/PCI Mgmt. Bus NIC Baseboard Mgmt. I2C Sensors & PCI Ctl Circuitry SMBus Controller (BMC) NV SDR, SEL,FRU Store System I/F System Bus Monitoring & Control Circuitry
(Volt, Temp, Power/Reset Control, etc)
W83910F
Enclosure Mgmt. Controller Monitoring & Control Circuitry FRU SEEPROM
Baseboard
IPMI F/W
Chassis
Page 2 Mar/2001
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Winbond Electronics
W83910F Block Diagram
ICMB LCD Module RS485,(SIN,SOUT) UART B (16550A) Modem
LCD Interface
UART A (16550A)
RTC & Watch Dog Timer
Voltage Temp. Fan Speed
Hardware Monitoring & Control
Micro-Controller
Multi General Purpose I/Os
LPC Interface
Master/Slave I C (5 sets)
2
General Chip Select CSn#
Flash & RAM I/F Flash RAM
Page 3 Mar/2001
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System I/F IPMB AOL2 S.B. SMBus*2 (KCS,BT,SMIC) (ICH)
Winbond Electronics
W83910F Features (I)
IPMI BMC
q Micro-Controller
8032 Micro-Controller Based Enhanced Peripheral Devices
q Interface and Connection
LPC Interface for System Bus with 3 Physical Protocols u Keyboard Control Style (KCS) u Block Transfer (BT) u Server Management Interface Chip (SMIC) 5 Sets of I2C Controller with 16-Bytes Transfer/Receive FIFOs u All of the 5 Sets Support Master/Slave Mode Two 16550A UARTs with 16-Bytes Send/Receive FIFOs u One for Remote Modem Connection u The other for ICMB Connection ISA Bus with Companion Chip
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Winbond Electronics
Page 4 Mar/2001
W83910F Features (II)
IPMI BMC
q Built-In Basic Hardware Monitoring (Sensor)
3 Thermal, 7 Voltages, 3 Fan Speed in Standard Mode u 3 Thermal Inputs Optionally for * Remote Thermistors * 2N3904 NPN-type Transistors * Intel TM CPU Thermal Diode Interface u 7 Voltage Inputs u 3 Sets of Fan Control * Fan Speed Monitoring * PWM (Pulse Width Modulation) Outputs for Fan Control 8 Thermal, 12 Voltages, 8 Fan Speed in Multiplex Mode
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Winbond Electronics
Page 5 Mar/2001
W83910F Features (III)
IPMI BMC
q Memory and Extra I/O Ports Support/Control
Provide/Support 1KB Internal SRAM Support up to 128KB External Flash Memory u Rewriteable I/F for 64KB Flash Memory (Default) u PSENHIGH Pin for Extra 2 Bank 64KB Flash Memory Switch Support up to 128KB External SRAM u Interface for 64KB SRAM (Default) u 4 Chip Select Pins for Extra 64KB SRAM, Every Pin Control 16KB Support Extra I/O Ports by 4 Chip Select Pins (The Same Pins as the Above Item) u Interface for Informative LCD Module
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Winbond Electronics
Page 6 Mar/2001
W83910F Features (IV)
IPMI BMC
q Others
Real Time Clock Watch Dog Timer 40 Programmable General Purpose I/O Pins
q Power Supply
5V Vcc for Legacy Devices; 5V AVcc for Analog Vcc (H/W Monitor); 3.3V Vcc for LPC Interface; 5V Vsb; Vbat Separate Vss for Digital and Analog Devices
q 128-PQFP
More Economic for Cost More Flexible for Layout
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Winbond Electronics
Page 7 Mar/2001
W83910F Features (V)
Debugger and Firmware
q Debugger
System Side Emulator u Interface with W83910F via LPC Bus Windows 2000, NT 4.0 Based Perform Like Standard 80C32 Emulator Friendly to Develop W83910F Firmware On-line Flash (BMC Firmware) Burning Direct Control to the Devices Monitor by W83910F
q BMC Firmware
Support IPMI, IPMB, ICMB Commands Pass Intel ICTS (IPMI Conformance Test Suite)
q Others
Driver Supports SMIC, KCS, BT Interface and Dynamics Switch Provide Snap-in to Support MMC (Microsoft Management Console) on Windows 2000
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Winbond Electronics
Page 8 Mar/2001
Winbond Hardware Monitor (Sensor) Overall Introduction
q W83781D --- 7 Voltage, 3 Fan On/Off, 3 Temp. Sensor (Thermistor) q W83782D --- 9 Voltage, 3 Fan PWM Control, 3 Temp. Sensor (Thermistor, Thermal Diode, 2N3904) q W83783S --- 5 Voltage, 2 Fan PWM Control, 2 Temp. Sensor (Thermistor, Thermal Diode, 2N3904) q W83L784R --- 5 Voltage, 2 Smart Fan TM Control, 2 Temp. Sensor (Thermistor, Thermal Diode, 2N3904) q W83L785R --- 4 Voltage, 2 Fan PWM Control, 2 Temp. Sensor, 9 GPIO (Thermistor, Thermal Diode, 2N3904) q W83791D --- Most Features of W83782D + Speech + ASF Sensor Spec.
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Winbond Electronics
Page 9 Mar/2001
W83791D Features
IPMI and ASF Sensor
q Unique Functions
Speech Function with Winbond Flash EEPROM W55FXX SMBus 2.0 ARP Command Compliant ASF Sensor Spec. Compatible Intel CPU VID Table Selection --- VRM 8.4 and VRM 9.0 Compliant 5 VID Input/Output Pins for CPU VID Control Powered By 5VSB 3 Sets of Smart Fan Control and 2 Sets of PWM Fan Control (Optional with Speech Function Pins) Internal Clock Oscillation Most Features of W83782D 2 Address Setting Pins for Multiple Devices Support (up to 4 Devices ) I2C Serial Bus Interface Only 48-LQFP
Winbond Electronics
Page 10 Mar/2001

* * * * *
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W83791D Block Diagram
EEPROM
CPU SLOTOCC#
Hardware Event Traps 1:5
Speech Synthesizer
S/W Event
8-Bit DAC
Monitor Event
SPK/LED
Voltage Input 1:9 Thermal Inputs 1:3
8-Bit ADC 0~4.096V
Configure and Control Register ASF Response Register
SMI#
Fan Inputs 1:3 PWM Outs 1:3
Fan Speed Control
Watch Dog Timer And Status Register
IRQ# OVT#
Case Open
I2C Serial Bus (ARP command compliant) SDATA SCLK
Beep GPIO
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Winbond Electronics
Page 11 Mar/2001
ASF(Alert Standard Forum) Spec. Introduction
q Goal
O To Enable Remote System Access and Control for Network Management in Both OS-present and OS-absent Environment
q Implementation
O LAN and Sensor Devices Are Powered by VSB O Standard I/F of Alerting Solutions for Different System and Chip Vendors
q Importance & Advantage
O ASF Will Be a Network Management Standard Spec. Boosted by Intel, 3Com, Gateway, Dell, Compaq ... etc. O Real Client PCs Management even None OS O To Reduce Network Maintain and Service Cost of MIS People
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Winbond Electronics
Page 12 Mar/2001
W83910F Winbond IPMI BMC
W83910F PRELIMINARY
1. GENERAL DESCRIPTION
W83910F is a management controller of Intelligent Platform Management Interface (IPMI). The management controller is based on the micro-controller 80C32 and enhances the peripheral device in the micro-controller, that including full function UART 16550A, System Management Bus (SMBus), system hardware monitor, PWM Control, and GPIO. LPC interface is supported to communicate with system management software (SMS). There are three physical protocols, which are SMIC (Server Management Interface Chip), and KCS (Keyboard Controller Style), and BT (Block Transfer), between the management controller W83910F and the system host. Micro-controller 80C32 is built inside the W83910F. The maximum 64K-byte flash memory interface signals are including 8-bit Address/Data Bus, one address latch signal ALE, 8 -bit high address bus, and external data memory control signal that can record the System Event Log (SEL) data. Two programming Chip Selects (CSA#, CSB#) are provided to select different memory ranges or I/O port ranges. The W83910F provides two UART ports that are fully compatible with 16550A. One UART port supports full MODEM connection signals which that can use external machine to communicate the management controller. Another UART port only supports 3 -wire connection signals which can communicate with the Intelligent Chassis Management Bus (ICMB). There are 5-set System Management Buses (SMBus) in the W83910F, which support 16 bytes Transfer/Receive FIFO and provide master/slave mode. One of SMBus is connected to Intelligent Management Platform Bus (IPMB) to access/control chassis management controller or Field Replaceable Unit (FRU) SEEPROM or AUX/Management-card connector. The others can be severed as private I2C to access FRU SEEPROM on the memory or processor board. An 8-bit analog-to-digital converter (ADC) was built inside W83910F. The W83910F can monitor 7 analog voltage inputs , 3 fan tachometer inputs, 3 temperature sensors or remote temperature sensors. The remote temperature sensing can be performed by thermistors, or 2N3904 NPN-type transistors, or directly from IntelTM CPU with thermal diode output. The W83910F provides 3 PWM (pulse width modulation) outputs to support fan speed control . The system management software (SMS) can communicate with W83910F through the LPC interface. There are three physical interfaces (SMIC, KCS, and BT) in the W83910F to request/response the IPMI messages. GPIO pins are supported to control/detect the external signal. The grouped interrupt and interrupt status are supported to give micro-controller as a service pointer when the GPIO input signal has a edge transition. For the spacing saving consideration of the Baseboard Management Controller system, W83910F is in the package of 128-pin PQFP.
-1 -
Publication Release Date: Feb,2001 Revision 0. 46
W83910F
PRELIMINARY
1. FEATURES
1.1 Micro-Controller Peripheral
* Two compatible 16550A UART port
--- One supports full MODEM connection signals --- One supports 3-wire connection signals * * Five sets system management Bus or master/slave I2C interface Hardware monitor - - * * 7 voltages, 3 fan speed, 3 temperature (Standard mode) 12 voltages, 8 fan speed, 8 temperature (with Multiplexer mode)
GPIO pins Three system management software interface using LPC
--- Server Management Interface Chip (SMIC) interface --- Keyboard Control Style (KCS) interface --- Block Transfer (BT) interface * Two system watch-dog timer --- Watch-dog Timer is supported to restart system --- Restart event record
1.2 UART
* Two high-speed 16550 compatible UARTs with 16-byte send/receive FIFOs * Fully programmable serial-interface characteristics: --- 5, 6, 7 or 8-bit characters --- Even, odd or no parity bit generation/detection --- 1, 1.5 or 2 stop bits generation * Internal diagnostic capabilities: --- Loop-back controls for communications link fault isolation --- Break, parity, overrun, framing error simulation * Programmable baud generator allows division of 1.8461 MHz by 1 to (216-1)
1.3 Hardware Monitoring Items
* * * 3 thermal inputs from remote thermistors or 2N3904 NPN-type transistors or PII /PIII ) thermal diode output 7 voltage inputs and one internal power voltage 3sets of fan speed control and fan speed monitoring input
--- PWM (pulse width modulation) outputs for fan speed control
Publication Release Date: Feb. 2001 -2 Preliminary Revision 0.46
W83910F
PRELIMINARY
1.4 Real Time Clock
* 27 bytes of clock, and control/status register (14 bytes in Bank 0 and 13 bytes in Bank 2); 242 bytes of general purpose RAM * * * * BCD or Binary representation of time, calendar, and alarm registers Counts seconds, minutes, hours, days of week, days of month, month, year, and century 12-hour/ 24-hour clock with AM/PM in 12-hour mode Daylight saving time option; automatic leap-year adjustment
1.5 General
* * * LPC Interface with Serial IRQ I2CTM serial bus interface 5V VDD or VSB operation
1.6 Package
* 128-pin PQFP
Publication Release Date: Feb. 2001 -3 Preliminary Revision 0.46
W83910F
PRELIMINARY 2. PIN CONFIGURATION
A O L D A T A # S M B D A T A I C H # S M B C L K I C H # S M B A L E R T # C S A # / M O D E # N V R A M C S # F A L L A E S H LA CR W O D SD R WL ## # # 0
G P B 1 5
G P B 1 4
G P B 1 3
I C M GG S C B PP RDS OD TD B B GSS TTI UCRR 1 1 NARSRN TDI X 21 D##### ####
I C M B T X #
A O L C L K #
G P B 1 0
A H M C X I
A H M C X O
V S B 5 V
C S B #
A D L 1
A D L 2
A D L 3
A D L 4
A D L 5
CASEOPEN GPC00 GPC01 GPC02 GPC03 GPC04 GPC05 GPC06 GPC07 GRSMRST# RTCXI# RTCXO# VBAT GPA00 GPA01 VDD5V GPA02 GPA03 GPA04 GPA05 GPA06 P1SMBCLK# P1SMBDATA# GPA07 GPA10 P2SMBCLK#
103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128
11199999999998888888888777777777766666 00098765432109876543210987654321098765 210
W83910F
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39
ADL6 ADL7 VSB3V ADDR8 ADDR9 ADDR10 ADDR11 ADDR12 ADDR13 ADDR14 ADDR15 PSENHIGH# GND GPB07 GPB06 GPB05 GPB04 GPB03 GPB02 GPB01 GPB00 IPMBDATA# IPMBCLK# BEEPER# VIN6/CSC# VIN7/CSD#
1
2
11111111112222222222333333333 345678901234567890123456789012345678
P 2 S M B D A T A #
G P A 1 1
G P A 1 2
G P A 1 3
L
P C I R S T #
F
R
A
M
L A D 0
L A D 1
L A D 2
L A D 3
E
#
P C I C L K
S E R I R Q
V D D 3 V
G P A 1 4
G P A 1 5
G P A 1 6
G P A 1 7
G P F 3 / F A N O U T 3
F A N O U T 2
F A N O U T 1
F A N O U T 0
F A N P R N T 2 / S E L 2
F A N P R N T 1 / S E L 1
F A N P R N T 0
F A N I N 2 / S E L 0
F A N I N 1 / G P I O F 1
F A N I N 0
A G N D
V I N 5
V I N 4
V I N 3
V I N 2
V I N 1
V R E F
V T I N 0
V T I N 1 / G P I T 1
V T I N 2 / G P I T 2
V S B 5 V
Publication Release Date: Feb. 2001 -4 Preliminary Revision 0.46
W83910F
PRELIMINARY 3. PIN DESCRIPTION
I/O8t I/O12t I/O12tp3 I/OD12t I/O24t OUT12t OUT12tp3 OD12 OD24 INcs INt INtd INts INtsp3 A IN A OUT - TTL level bi-directional pin with 8 mA source-sink capability - TTL level bi-directional pin with 12 mA source-sink capability - 3.3V TTL level bi-directional pin with 12 mA source-sink capability - TTL level bi-directional pin open drain output with 12 mA sink capability - TTL level bi-directional pin with 24 mA source-sink capability - output pin with 12 mA source-sink capability - 3.3V TTL level output pin with 12 mA source-sink capability - Open-drain output pin with 12 mA sink capability - Open-drain output pin with 24 mA sink capability - CMOS level Schmitt-trigger input pin - TTL level input pin - TTL level input pin with internal pull down resistor - TTL level Schmitt-trigger input pin - 3.3V TTL level Schmitt-trigger input pin - Analog input - Analog output
Pin No.
5 6 10,9,8,7 11 12
Pin name
PCIRST# LFRAME# LAD[3:0] PCICLK SERIRQ
Type
INtsp3 INtsp3 I/O12tp3 INtsp3 I/OD12t
Description
LPC interface reset signal (PCIRST#) Indicates start of a new cycle, termination of broken cycle. Multiplexed Command, Address, and Data bus 33M Hz clock input for LPC bus This signal implements the serial interrupt protocol
LPC Interface .
System I2C Interface. 124 125 128 1 P1SMBCLK# P1SMBDATA# P2SMBCLK# P2SMBDATA# I/OD12st I/OD12st I/OD12st I/OD12st Private I2CT M bus 1 clock Private I2CT M bus 1 data. Private I2CT M bus 2 clock Private I2CT M bus 2 data.
IPMB Interface. 42 43 IPMBCLK# IPMBDATA# I/OD20st I/OD20st IPMB clock IPMB data
RS-232 serial interface to connect to MODEM. 96 95 94 CTS# DSR# RTS# INt INt OUT8 Clear To Send Data Set Ready Request To Send
Publication Release Date: Feb. 2001 -5 Preliminary Revision 0.46
W83910F
PRELIMINARY
93 92 91 90 89 DTR# SIN SOUT DCD# RI# OUT8 INt OUT8 INt INt Data Terminal Ready Receiver Data Input Transmitter Data Output Data Carrier Detect Ring Indicator
Serial interface to connect ICMB 88 87 ICMBRX# ICMBTX# INt OUT8 ICMB Receiver Data Input ICMB Transmitter Data Output
Flash ROM & NVRAM interface 71 63-70 53-61 72 73 74 75 76 77 ALE ADL[7:0] ADDR[16:8] WD# RD# FLASHCS# NVRAMCS# CSA# / MODE# CSB# OUT12 I/O12t OUT12 OUT12 OUT12 I/O12st OUT12t O12t / Its O12t Address Latch enable ADDR/Data Bus Address bus Write Command Read Command Flash rom chip select Non-volatile ram chip select General Purpose Chip Select# / Standard or Multiplex mode trapping General Purpose Chip Select#
Private I2C interface 82 83 84 85 86 112 SMBALERT# SMBCLKICH# SMBDATAICH# AOLCLK# AOLDATA# GRSMRST# I/OD6st I/OD6st I/OD6st I/OD6st I/OD6st Its SMBus alert I2C bus Clock signal I2C bus Data signal I2C bus Clock signal/AOL-II I2C bus Data signal/AOL-II Resume reset from standby power good.
BMC & RTC crystal 80 79 113 114 BMCXI BMCXO RTCXI RTCXO XI XO XI XO 40MHz Crystal/Clock input for BMC Crystal output from BMC 32.768KHz Crystal input for RTC Crystal output for RTC
Hardware monitor sensor input 33 32 31 30 29 40 VIN1 VIN2 VIN3(+5V) VIN4(+12V) VIN5(+3V) VIN6 / CSC# AIN AIN AIN AIN AIN AIN Voltage sensor 1 Voltage sensor 2 Voltage sensor 3 Voltage sensor 4 Voltage sensor 5 Voltage sensor 6 / General Purpose Chip Select#
Publication Release Date: Feb. 2001 -6 Preliminary Revision 0.46
W83910F
PRELIMINARY
39 34 35 36 37 27 26 25 24 23 22 21 20 19 18 41 103 VIN7 / CSD# VREF VTIN0 VTIN1 / GPIT1 VTIN2 / GPIT2 FANIN0 FANIN1 / GPIOF1 FANIN2 / SEL0 FANPRNT0 FANPRNT1 / SEL1 FANPRNT2 / SEL2 FANOUT0 FANOUT1 FANOUT2 GPF3 / FANOUT3 BEEPER# Caseopen AIN AOUT AIN AIN AIN Its Its Its / OUT12 Its Its / OUT12 Its / OUT12 OUT12 OUT12 OUT12 Its / OUT12 OUT12 I/OD6 Voltage sensor 7 / General Purpose Chip Select# Reference voltage output Thermal sensor input 0 Thermal sensor input 1 / When at Multiplex mode, this pin is GPI function. Thermal sensor input 2 / When at Multiplex mode, this pin is GPO function. Fan tachometer input 0 Fan tachometer input 1 / When at Multiplex mode, this pin is GPIO function Fan tachometer input 2 / Multiplex mode select output 0 Fan present input 0 Fan present input 1 / Multiplex mode select output 1 Fan present input 2 / Multiplex mode select output 2 Fan PWM output 0 to control fan speed Fan PWM output 1 to control fan speed Fan PWM output 2 to control fan speed General Purpose Output / Fan PWM output 3 to control fan speed in Multiplex mode Alarm sound output Chassis intrude indicator. An active high input from an external circuit which latches a Case Open event..
Power and ground 28 52,97 115 38,78 62 13 118 AGND GND VBAT VSB5V VSB3V VDD3V VDD5v Ground Ground Power Power Power Power Power Analog ground Ground Battery Power 5V standby power 3V standby power 3V power 5V power
General Purpose I/O pins 2,3,4,14,15 ,16,17, 116,117, 126,127, 119~123 44~51,81, 98~102 104~111 GPB00~GPB07, GPB10~GPB15 GPC00~GPC07 Its General Purpose I/O with VBAT power I/OD12st General Purpose I/O with VSB power GPA00 ~ GPA07, GPA10~GPA17 I/OD12st General Purpose I/O with VCC power
Publication Release Date: Feb. 2001 -7 Preliminary Revision 0.46

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